发明名称 High speed capture latch
摘要 A high speed capture latch includes differential data inputs, a latch clock input, a boost clock input, a current steering circuit, a switched current source, a latch element and first and second boost current sources. The current steering circuit has first and second differential control terminals which are coupled to the differential data inputs and control current through first and second current paths, respectively. The switched current source is coupled between the current steering circuit and a first voltage supply terminal and has a control terminal coupled to the latch clock input. The latch element is coupled between a second voltage supply terminal and the current steering circuit and provides a latch output. The first boost current source is coupled to the first current path between the latch element and the current steering circuit and has a control terminal coupled to the boost clock input. The second boost current source is coupled to the second current path between the latch element and the current steering circuit and has a control terminal coupled to the boost clock input.
申请公布号 US5748020(A) 申请公布日期 1998.05.05
申请号 US19960595821 申请日期 1996.02.02
申请人 LSI LOGIC CORPORATION 发明人 MACTAGGART, IAIN ROSS;WELCH, JAMES R.;FIEDLER, ALAN
分类号 H03K3/037;H03K3/356;(IPC1-7):H03K19/096 主分类号 H03K3/037
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