Inter-processor asynchronous serial communication transmission/reception apparatus using each other's memories

摘要

An inter-processor asynchronous serial communication transmission/reception apparatus using each other's memories. Some strips of line and a few drivers are used to transmit data far in an asynchronous serial communication manner employing dual port random access memories. Therefore, the present invention is economical and convenient to use. Further, one processor can use the dual port random access memory of the other processor like its own memory. This enables a parallel communication manner. Moreover, a wait signal is used when the data transmission and reception between processors are frequently performed. The use of wait signal requires no function for processing overhead resulting from an interrupt.