发明名称 GATE ARRAY
摘要 PURPOSE:To save the space and easily obtain variety of gate arrays in various scales from small size to large size by extending the power supply bus and earth bus between the end portions of input/output cell columns to which the power supply voltage is applied and the columns of basic cells and supplying power to the columns of basic cells from each input/output cell through these buses. CONSTITUTION:A gate cell array is constituted by the columns of basic cells 1, input/output cells 2 and basic cells 10 like the usual cell array, with only difference that the power supply bus 3 and earth bus 4 surrounding the cell columns 10 are provided in parallel between the input/output cell columns 2 and the cell columns 10 surrounding a plularity of basic cell columns 10. In such a structure, the power supply voltage sent from each input/output cell 2 is once supplied between the buses 3 and 4 and then supplied to the basic cell 1 of basic cell columns 10 through each horizontal power supply line VDD and horizontal earth line VSS. Thereby, the space can be saved. Accordingly, the cells can be arranged closely and array design can be simplified.
申请公布号 JPS60101951(A) 申请公布日期 1985.06.06
申请号 JP19830210274 申请日期 1983.11.08
申请人 SANYO DENKI KK 发明人 KITAMURA YUUJI;NAKAMU ICHIROU
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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