| 摘要 |
A sampling pulse generator utilizes sampling clocks CLi each having a frequency which corresponds to a character data signal D to be sampled. Each phase of these clocks CLi is progressively and slightly deviated from one another. One of these clocks CLi will be in-phase with the signal D. A feedback signal P1 corresponding to one of these clocks CLi is phase-compared with a clock run-in signal CR which is used as the phase reference of signal D. If signal P1 leads signal CR in phase, the suffix "i" of CLi is incremented, while the suffix "i" is decremented if signal P1 lags in phase behind signal CR. By the change of suffix "i" of clocks CLi, the phase difference between signals P1 and CR is minimized. One of the sampling clocks CLi thus obtained is used as a sampling pulse output SP of the sampling pulse generator which is substantially in-phase with the signal CR or D.
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