Static semiconductor memory device capable of reducing precharging power dissipation

摘要

In a static semiconductor memory device including a plurality of groups of memory cells (M11, M12, @ ), a plurality of word lines (WL1, WL2, @ ), and a plurality of bit line pairs (BL1, BL1, @ ), a plurality of transfer gate circuits (TG11, TG12, @ ) are provided. Each of the transfer gate circuits is connected between one group of the groups of memory cells and one of the bit line pairs, and is controlled by a voltage at one of the word lines. <IMAGE>