发明名称 |
Dielectric for interconnect structure |
摘要 |
<p>Significant amounts of pattern distortion have been found to be the result of reflowing borophosphosilicate glass (BPSG) and silicon dioxide shrinkage during high temperature junction anneals. In order to remedy this problem, a method for suppressing the pattern distortion by subjecting the wafer coated with BPSG and with silicon dioxide layers to a high temperature anneal before patterning is disclosed. The high temperature anneal densifies the undoped silicon dioxide before patterning, so that shrinkage of the undoped silicon dioxide does not affect the patterning steps. <IMAGE></p> |
申请公布号 |
EP0838851(A2) |
申请公布日期 |
1998.04.29 |
申请号 |
EP19970308095 |
申请日期 |
1997.10.13 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;SIEMENS AKTIENGESELLSCHAFT |
发明人 |
GAMBINO, JEFFREY PETER;NGUYEN, SON VAN;STENGL, REINHARD |
分类号 |
H01L21/28;H01L21/316;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/768 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|