发明名称 CACHE MEMORY
摘要 PURPOSE:To given an access at a main memory at high speed by dividing a cache memory into plural blocks and allocating each of these blocks exclusively or in common to plural programs. CONSTITUTION:A cache memory 3A is divided into four blocks 0-3. While a program 7 includes four programs 0-3. Then the correspondence is secured between the program 7 and the block 6 of the memory 3A by the command of a CPU 1. In other words, a block 0 is allocated to a program 0 and can be used exclusively with no disturbance given from other programs. Then blocks 1 and 2 are allocated to a program 1 for the exclusive use of both blocks. A block 3 is allocated in common to both programs 2 and 3.
申请公布号 JPS62144257(A) 申请公布日期 1987.06.27
申请号 JP19850284280 申请日期 1985.12.19
申请人 MITSUBISHI ELECTRIC CORP 发明人 SHINTO TAKAO
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项
地址