发明名称
摘要 An analog to digital converter circuit uses a reference voltage which increases in proportion to an intensity level of an input analog signal, or a reference signal which decreases in proportion to an intencity level of undesired signal components included in an input analog signal which AGC controlled, and thus maintains an adaptive quantizing level for a varying input signal level or a varynig desired signal level in an input signal without a DA converter.
申请公布号 JP2746158(B2) 申请公布日期 1998.04.28
申请号 JP19940315773 申请日期 1994.11.25
申请人 发明人
分类号 H03M1/10;H03M1/18;H04L27/22;H04L27/38 主分类号 H03M1/10
代理机构 代理人
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