发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To enable bipolar transistors to be highly integrated without limiting the applicable numbers of transistors to any specified value by a method wherein CMOS transistors and bipolar transistors are vertically laminated to be formed into one body. CONSTITUTION:A drain and source (N<+> regions 8, 9) and N channel MOS transistor Q1 formed of the same impurity as an emitter region of an NPN type bipolar transistor Q3 are provided in a base region (P region 6) of the transistor Q3. Likewise, a source and drain (P<+> regions 7, 10) and a P channel MOS transistor Q2 formed of the same impurity as a base region of the transistor Q3 are provided in a collector region (N type well region4) of the transistor Q3. In such a constitution, the drain 8 of Q1 and the drain 10 of Q2 are electrically junctioned with each other; the drain 10 of Q2 is in common with the base region 6 of Q3; and the source 7 of Q2 and a collector terminal (N<+> electrode region 5) are electrically connected.
申请公布号 JPS62169466(A) 申请公布日期 1987.07.25
申请号 JP19860011268 申请日期 1986.01.22
申请人 TOSHIBA CORP 发明人 IIZUKA TETSUYA
分类号 H01L27/092;H01L21/8238;H01L21/8249;H01L27/06;H01L27/07;H03K19/08 主分类号 H01L27/092
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