| 摘要 |
PURPOSE:To efficiently verify a logic in the early stage by providing a logic circuit model where a part of the logic of an information processor to be tested is defined as a unit to be tested and a logic function model where an operation function can be separated in an interface corresponding to the logic circuit model. CONSTITUTION:A logic circuit model 1, a logic function model 2, and a communication routine 3 are provided. When the instruction execution processing of a test executing part reaches the interface to the logic circuit model 1 or the test is not continued on TMP and TMP is executed up to the last, the logic function model 2 interrupts or stops the instruction executing operation, and contents of various updated registers such as a PSE 71, a GR 72, and an OBR 74 and various information are sent to the communication routine 3. The communication routine 3 discriminates the necessity of logic simulation continuity based on information received from the logic function model 2. If continuity is necessary, the logic circuit model 1 is started again, and the logic circuit model 1 repeats instruction execution.
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