| 摘要 |
A variable-frequency variable-input-voltage switched-mode power converter, in which a voltage minimum on the primary switching transistor IS estimated as a fixed value which is determined by the time constant of the reactances on the primary side of the converter, and does not vary with the switching frequency. In the presently preferred embodiment, this fixed time-constant-determined delay is used by a secondary-side control subsystem to estimate zero-crossings of the current on the primary side, without using any dissipative current sensing techniques.
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