发明名称 Enhanced power-on-reset/low voltage detection circuit
摘要 A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provide initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored for stability over the range of 2.5 to 5.5 volts.
申请公布号 US5744990(A) 申请公布日期 1998.04.28
申请号 US19950555369 申请日期 1995.11.08
申请人 STANDARD MICROSYSTEMS CORPORATION 发明人 BURSTEIN, STEVEN;IBRAHIM, SHARIF M.
分类号 H03K17/22;(IPC1-7):H03K17/22 主分类号 H03K17/22
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