发明名称 |
Method and system for programming a gate array using a compressed configuration bit stream |
摘要 |
A generalized data decompression engine is incorporated within a field programmable gate array ("FPGA"). The generalized data decompression engine uses a general purpose data decompression technique such as, for example, a Lempel-Ziv type technique. During operation, a compressed configuration bit stream is received by the generalized data decompression engine in the FPGA and is decompressed thereby. A resultant decompressed configuration bit stream is then used to program logic cells within the FPGA.
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申请公布号 |
US5745734(A) |
申请公布日期 |
1998.04.28 |
申请号 |
US19950536901 |
申请日期 |
1995.09.29 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CRAFT, DAVID JOHN;GOULD, SCOTT WHITNEY;KEYSER, III, FRANK RAY;WORTH, BRIAN |
分类号 |
H03K19/173;G06T9/00;H03K19/177;H03M7/30;H03M7/40;(IPC1-7):H03M7/46 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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