发明名称 |
Pipelined architecture for patterned halftone generation |
摘要 |
The present invention is a super-scalar method and apparatus for the generation of halftone dot patterns in an image processing system. The super-scalar design employs at least one block of memory for the storage of at least one predetermined halftone dot pattern across a plurality of unique locations therein, and a sequencer for producing an index into said memory as a function of the position of the pixel along a scan line and the halftone dot characteristics. Also included is addressing circuitry for memory access control, to combine the index produced by said sequencer and a pixel value for the pixel to produce a memory address, the memory address being thereby employed to access one of said locations in memory and to cause said memory to output a signal representative of a portion of the halftone dot pattern stored at the unique addressed location.
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申请公布号 |
US5745249(A) |
申请公布日期 |
1998.04.28 |
申请号 |
US19960770922 |
申请日期 |
1996.12.20 |
申请人 |
XEROX CORPORATION |
发明人 |
CREAN, PETER A.;ZECK, NORMAN W. |
分类号 |
G06T1/20;G06T5/00;H04N1/405;(IPC1-7):H04N1/40;G06K9/54 |
主分类号 |
G06T1/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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