发明名称 |
Method of mounting electronics component |
摘要 |
A method for mounting on integrated circuit having many leads with narrow pitches on the printed circuit board. In a method, a resist layer is formed between lands on the board, and solder paste is applied with a stencil to the lands so that the positions of the solder paste on the lands are staggered. Then, leads of the integrated circuit are positioned on the lands. Then, reflow soldering of the leads to the lands is performed with the solder paste in a nitrogen environment. In a different embodiment, each land includes a first portion and a second portion having a width narrower than the first portion, and the second portions are arranged staggeredly among the lands. Then, solder paste is applied to the first portions having the wider width. Then, reflow soldering of the leads to the lands is performed with the solder paste in a nitrogen environment. If solder including bismuth is used, reflow soldering can be performed in ambient environment.
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申请公布号 |
US5743007(A) |
申请公布日期 |
1998.04.28 |
申请号 |
US19960587461 |
申请日期 |
1996.01.17 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
ONISHI, HIROAKI;NAGATA, HARUTO;HIRANO, MASATO;SUETSUGU, KENICHIRO |
分类号 |
H05K1/11;H05K3/34;(IPC1-7):H05K3/34 |
主分类号 |
H05K1/11 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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