| 摘要 |
PROBLEM TO BE SOLVED: To enhance memory cell reading and writing speeds by connecting ground side terminals of a memory cell to second bit line pair which is independent every cell and setting the bit line pair to the ground potential via a pull- down circuit. SOLUTION: A bit line pair pulling up circuit 51 sets initial potentials of one pair of bit lines D0, the inverse of D0 to a power source potential Vdd. When a word line WL0 is selected, the electric charge of the bit line, the inverse of D0 is ejected to a ground side along the arrow ΔI via the storage data terminal, the inverse of R0 of a side storing '0' in a memory cell 50. A sense amplifier 60 outputs amplified outputs by amplifying potentials in which the potential of the bit line, the inverse of D0 is lowered by a minute value to output terminals I/O, the inverse of I/O. One pair of second bit lines G0, the inverse of G0 are provided and ground side terminals of the memory cell 50 are connected to the second bit liens to be set to a ground potential via a pull-down circuit 52. The sense amplifier 60 establishes outputs in a short time by receiving four kinds of potentials from the first and second bit lines D0, the invese of D0, G0, the onverse of G0. |
