MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

PROBLEM TO BE SOLVED: To prevent a gate oxide film in a peripheral circuit region from being cut by over-etching during patterning of a conductive film deposited in an upper part of a gate electrode of an MISFET(metal insulator semiconductor field effect transistor) constituting a memory cell. SOLUTION: After a conductive layer pattern 50a which becomes a floating gate of a flash memory is formed in a memory cell region of a main surface of a semiconductor board 1, a polycrystalline silicon film 52 of a film thickness (b) which is larger than a difference (a) between the conductive layer pattern 50a and a gate oxide film 42 is formed in a memory cell region and a peripheral circuit region of a main surface of the semiconductor board 1. Thereafter, the polycrystalline silicon film 52 is made flat by a CMP(chemical mechanical polishing) method for eliminating a difference between the polycrystalline silicon film 52 of an upper part of the conductive layer pattern 50a and the polycrystalline silicon film 52 of an upper part of gate oxide films 31, 42.