发明名称 FREQUENCY SYNTHESIZER TUNER
摘要 PURPOSE:To properly adjust each tuning means with respect to a receiving channel by supplying a correction voltage set properly in response to the tuning deviation at each reception channel to each tuning means of a receiving circuit. CONSTITUTION:A control voltage of a PLL circuit 3 is fed to an antenna tuning circuit 2 and an RF tuning circuit 4a via adder circuits 24, 25. The correction value stated later is fed to other input terminal of each adder circuit. A memory 22 stores a correction value representing the deviation of the tuning frequency of the said tuning circuit at each reception channel in addition to a control program. In the receiving operation, the correction value corresponding to the reception channel is read and set to correction registers 23, 24. A correction voltage in response to the correction value is obtained and added to the control voltage from the circuit 3, and the result is fed to each tuning circuit.
申请公布号 JPS63107310(A) 申请公布日期 1988.05.12
申请号 JP19860253312 申请日期 1986.10.24
申请人 PIONEER ELECTRONIC CORP 发明人 KANEKO KAZUTSUGU;KIKUCHI TAKAHARU;YUMOTO TAKEMI
分类号 H03J7/28 主分类号 H03J7/28
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