发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To freely set the degree of the improvement of S/N by permitting an adder circuit to delay an output signal by 2H and adding it to a line sequential signal. CONSTITUTION:The line sequential signal Vin is inputted to the one terminal of the adder circuit 9. According to the coefficient K of a 1st coefficient multiplier 11, the level of an output signal V1 from the adder circuit 9 is modified through a 1H delay circuit 10. Moreover a 2H delay signal is inputted to the other input terminal of the adder circuit 9 through a 2nd 1H delay circuit 13. Color difference signals R-Y and B-Y are alternately outputted from the adder circuit 9 at every hour. A subtractor 12 outputs the difference signal V3 between input/output signals from the coefficient multiplier 11. A 2nd coefficient multiplier 14 changes the level of the signal V1, and a subtractor circuit 15 outputs the difference signal V2 between input/output signals from the coefficient multiplier 14. The color difference signals R-Y synchronized through changeover switches 5 and 6 which are synchronously changed over at every hour are outputted to a terminal 7, and the synchronized color difference signal B-Y to a terminal 8.
申请公布号 JPS63107292(A) 申请公布日期 1988.05.12
申请号 JP19860254116 申请日期 1986.10.23
申请人 MITSUBISHI ELECTRIC CORP 发明人 KATO SUMIO
分类号 H04N11/22 主分类号 H04N11/22
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