发明名称 SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To inhibit signal delay when an amplifier is driven and to reduce the power consumption of a signal processing circuit by controlling the supply and cut off of a power source to the amplifier and an output circuit in synchronism with the supply and cut off an input signal to the amplifier. CONSTITUTION:When an input signal Vin is not supplied, a control signal Vc is held at a high level and while the supply and sink of a constant current I0 to the amplifier 1 are stopped, an output circuit 2 is turned off. The electric power is consumed by only control transistors (TR) Q12 and Q16 and the power consumption is reduced greatly. Further, the constant current I0 is cut off by a power source control circuit 3 the emitters of TRs Q3 and Q4 are disconnection from a ground line, so coupling capacitors C1 and C2 enters a floating state and can not be charged. Consequently, when the control signal Vc is switched from the high level to a low level, an output signal Vout is neither delayed nor waveform-rounded and signal transmission is speeded up.
申请公布号 JPS63107211(A) 申请公布日期 1988.05.12
申请号 JP19860251671 申请日期 1986.10.24
申请人 HITACHI LTD 发明人 SATO KOICHI
分类号 H03F3/45;H03F3/72 主分类号 H03F3/45
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