发明名称 SHIFT REGISTER
摘要 FIELD: pulse equipment, computer engineering, control circuits. SUBSTANCE: device has D flip-flops 1-4, clock bus 11, input bus 12, output bus 13. Two-channel multiplexer 5, RC gates 6-9, inverter 10 and new functional connections are introduced to accomplish the goal of invention. D flip-flops 1-4 are designed as single-step flip-flops which are clocked by level. This results in possibility to input information characters into register and to shift them only threshold check of duration of information characters at inputs of shift register bits and shift pulses. Current states of register are stored in level-clocked D flip-flops and capacitors of RC gates which state is kept using feedback circuits. EFFECT: increased stability to noise. 1 dwgk
申请公布号 RU2110099(C1) 申请公布日期 1998.04.27
申请号 RU19930051735 申请日期 1993.11.02
申请人 VSEROSSIJSKIJ NAUCHNO-ISSLEDOVATEL'SKIJ INSTITUT E;VSEROSSIJSKIJ NI SKIJ I E 发明人 ZUBAEROV R.F.;ZUBAEROV R.F.
分类号 G11C19/36;G11C19/00;(IPC1-7):G11C19/00 主分类号 G11C19/36
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