| 摘要 |
PROBLEM TO BE SOLVED: To attain continuously using without restoring it even when a fault signal occurs in a partial timing signal generation circuit and to improve yield and reliability by taking out relatively many signals among the signals generated in plural timing signal generation circuits with an operation circuit. SOLUTION: This timing signal generation circuit is provided with three lines of shift registers 101-103 simultaneously performing the same operation by the same clock signal and a positive logic timing input signal, and operates as a timing signal generation part. Then, when any one among three lines of shift registers 101-103 doesn't output a normal signal, relatively many real signals are taken out by the operation circuit consisting of 2-input NAND circuits 104-106 and a 3-input NAND circuit 107 arranged on the output side of the shift register lines, and then, an abnormal signal is removed. Thus, the signals and the timing signal are outputted to the next stage shift register lines normally. |
