发明名称 APPAREIL DE MESURE DE TAUX D'ERREUR
摘要 <p>An error rate measuring apparatus includes a demodulator, and data from the demodulator is applied to a decoding circuit in which an error bit number is evaluated for each of a BIC portion and a packet portion. In the BIC portion, if a synchronization is settled, the error bit number is evaluated by comparing received BICs and a predetermined BIC pattern, and if the synchronization is not settled, the error bit number is determined as eight (8) bits. In the packet portion, if a frame synchronization is settled and decoding is successful, the error bit number is calculated by comparing data before decoding and data after decoding with each other. If the frame synchronization is settled but the decoding is unsuccessful, a presumed error bit number is set according to the number of packets being decoded successfully in a first time horizontal direction, and if the frame synchronization is not settled, a predetermined error bit number is set. In each of the BIC portion and the packet portion, a bit error rate is calculated on the basis of the error bit number for each measurement range, and displayed on a monitor.</p>
申请公布号 FR2726715(B1) 申请公布日期 1998.04.24
申请号 FR19950013205 申请日期 1995.11.08
申请人 SANYO ELECTRIC CO LTD 发明人 YAMASHITA SYUGO;TOMIDA YOSHIKAZU;TOKUMOTO TERUMASA;HONDA MINORU;KUBO TOSHIHIRO
分类号 H04N19/00;H04B1/16;H04L1/00;H04L1/24;H04N7/20;H04N19/42;H04N19/423;H04N19/44;H04N19/65;H04N19/70;H04N19/89;H04N21/61;H04N21/647;(IPC1-7):H04L27/14;H04J1/02 主分类号 H04N19/00
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