发明名称 MULTIPROCESSOR SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To accelerate multiplying processing without adding any special circuit by composing a system of processors having no dedicated numerical processing unit, and parallelly allocating the processing of multiplication to slave CPU. SOLUTION: When performing the multiplication of A×B=C, a master CPU 1 divides a multiplicand A by slicing it into bits. When four slave CPU 21-24 can be used, for example, the multiplicand A is divided into four. Then, the divided multiplicands and a multiplier B are transmitted to the slave CPU 21-24. The master CPU 1 makes positional information showing which part of the original multiplicand A segments these divided multiplicands correspondent to the slave CPU 21-24 to which these divided multiplicands are allocated. The slave CPU 21-24 find products from the divided multiplicands and the multiplier B and transmit them to the master CPU 1. While referring to correspondent relation, the master CPU 1 integrates the products found by the slave CPU 21-24 while weighting them.</p>
申请公布号 JPH10105524(A) 申请公布日期 1998.04.24
申请号 JP19960254194 申请日期 1996.09.26
申请人 SHARP CORP 发明人 SATO RYOICHI
分类号 G06F7/53;G06F7/52;G06F15/16;G06F15/80;(IPC1-7):G06F15/16 主分类号 G06F7/53
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