| 摘要 |
<p>PROBLEM TO BE SOLVED: To eliminate the problem of an excessive erasure and to increase the integration degree of a flash EEPROM by a method wherein a floating gate electrode and a control gate electrode are formed on a sidewall part at a recessed part which is formed on a semiconductor substrate. SOLUTION: Drain regions 4 are formed in recessed parts 10 on a P-type single-crystal silicon substrate 1, and source regions 3 are formed in protruding parts 11. Floating gate electrodes 8 are formed, via thin silicon oxide films 6, on sidewall parts 14, at the recessed parts 10, which are sandwiched between the source regions 3 and the drain regions 4. Control gate electrodes 9 are formed, via thick silicon oxide films 7, on the floating gate electrodes 8. Then, the floating gate electrodes 9 are arranged in channel regions 5 via the silicon oxide films 6, 7 so as to constitute selector gates 15. Thereby, a selector transistor 16 which is used to select individual memory cells themselves is constituted. Consequently, even when an excessive erasure is generated, it is possible to control the continuity and the noncontinuity of memory cells 2.</p> |
