| 摘要 |
PROBLEM TO BE SOLVED: To enhance the characteristics and performance at the time of selecting a word line by preventing instantaneous power supply voltage drop due to potential drop of N well thereby speeding up the rising of a selected word line. SOLUTION: First and second P type MOS transistors MP1, MP2 connected in series and first and second N type MOS transistors MN1, MN2 connected in parallel are connected in cascade between first and second power supply terminals Vcc, Vss and input signals to the gate of the transistors are subjected to NOR operation. In such a logic circuit, an N type MOS transistor MN3 is provided as means for drawing charges stored at the node N1 of the P type MOS transistors MP1, MP2 when the the P type MOS transistor MP1 makes a transition from conducting state to nonconducting state. |
