发明名称 |
METHOD FOR TESTING AND FOR GENERATING A MAPPING FOR AN ELECTRONIC DEVICE |
摘要 |
In a method for generating a mapping of logical addresses to a layout of an electronic circuit structure first and second relations are established. The first relation is representative of the mapping of signal pairs to the layout and the second relation is representative of the mapping of the logical addresses to the signal pairs. Joining of the first and second relations yields a mapping table which can be used for purposes of circuit testing and design.
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申请公布号 |
WO9816881(A1) |
申请公布日期 |
1998.04.23 |
申请号 |
WO1997EP05635 |
申请日期 |
1997.10.13 |
申请人 |
MOTOROLA, INC. |
发明人 |
BRACHA, GABRIEL;WEISBERGER, EYTAN |
分类号 |
G01R31/3183;G06F11/22;G06F17/50;H01L21/82;(IPC1-7):G06F11/263 |
主分类号 |
G01R31/3183 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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