Method for optimising a memory cell matrix for a semiconductor integrated microcontroller

摘要

The invention relates to a matrix of memory cells for a semiconductor integrated microcontroller, being of the type intended for accommodation between macrocells of the microcontroller, so as to minimize the consumption of circuit area on the semiconductor. The matrix comprises memory cells which are organized into rows and columns, with the number of columns defining the matrix height (X), which is advantageously variable according to the number of bits intended for selecting the matrix column, while its width (Y) is dependent on the overall capacity of the memory. <IMAGE>