发明名称 |
A/D reference level adjustment circuit to maintain optimum dynamic range at the A/D |
摘要 |
A method and circuit for controlling a reference voltage for an analog-to-digital converter having plural outputs includes a sensor for indicating when outputs from the A/D converter are at least a desired voltage, and a processor responsive to the sensor and connected to a digital-to-analog converter which provides a reference voltage for the A/D converter. The processor provides signals to the D/A converter which change the reference voltage. A logic unit in the processor increments an accumulator when either an I or a Q component in the A/D converter output is at least the desired voltage and decrements the accumulator when neither the I nor the Q component is at least the desired voltage. A counter may buffer the accumulator changes. <IMAGE> |
申请公布号 |
EP0757447(A3) |
申请公布日期 |
1998.04.22 |
申请号 |
EP19960111715 |
申请日期 |
1996.07.19 |
申请人 |
HARRIS CORPORATION |
发明人 |
ANDREN, CARL;LUCAS, LEONARD V.;GOKHALE, RAVINDRA V.;SNELL, JAMES |
分类号 |
H03M1/18;H03M1/12 |
主分类号 |
H03M1/18 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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