| 摘要 |
PURPOSE:To divide a capacity connected to the clock signal line of each block and to drive the capacity with a general purpose C-MOS driver by dividing a transfer means into plural blocks and supplying a clock signal at every block only when a scanning signal is transferred. CONSTITUTION:When an input start signal Hs is supplied to the initial clocked inverter I10-1 of a 1st block, the signal Hs is transferred in accordance with clock signals Hc, Hc' generated from amplifiers 21, 21' and output signals phiH1 to phiHn are successively outputted. In the n-th clock, a clocked inverter Hn0-1 is driven, and at the (n+1)th clock, a clocked inverter In3-1 is driven, the transferred signal Hs is latched and the clocked inverter I10-2 of a 2nd block is driven to supply the signal Hs to the 2nd block. Since the gate of a switching element corresponding to 1/4 the original one is connected to the clock signal line of each block, the capacity based upon the switching element is reduced to 1/4, so that driving based upon the amplifiers 21 to 24, 21' to 24' can easily be executed. |
