| 摘要 |
A non-volatile semiconductor memory includes a plurality of memory cells. Each memory cell includes N-type source and drain regions formed in a P-well on a semiconductor substrate, a floating gate formed on the P-well with a tunnel oxide film therebetween, and a control gate formed on the floating gate with an interpoly dielectric film therebetween. The memory has a plurality of bit lines, a plurality of word lines and a source line. The source region of each memory cell is connected to the source line. The drain region of each memory cell is connected to one of the word lines. The memory cell is written to, erased, or read by selectively supplying suitable voltages to the source, bit, and word lines connected thereto. When a selected memory cell is written to by injection electrons into its floating gate, (1) a negative voltage is applied to the P-well and the source line, (2) a first positive voltage is applied to the selected bit line, (3) a second positive voltage is applied to the selected word line, and (4) OV is applied to the non-selected word line. The second positive voltage applied to the control gate is lower than a predetermined voltage between the source and the control gate.
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