发明名称 LOGIC SIMULATOR
摘要 There is disclosed a logic simulator having a wiring load extraction function which is capable of accurately calculating characteristic data of wiring loads when wirings are shortly spaced. A wiring region dividing unit (1) and a wiring load model generator (3) convert a wiring layout data (D10) into a wiring load model circuit data (D12) including wiring load models respectively for divided wiring regions into which a wiring is divided as a function of the number of adjacent wirings. A wiring load distributed constant calculator (4) extracts characteristic parameters in accordance with the number of adjacent wirings of each of the wiring load models in the circuit data (D12) from a unit length wiring characteristic parameter group (D13) including different characteristic parameters in accordance with the number of adjacent wirings, to output a distributed constant circuit data (D14) including the characteristic data of the respective wiring load models as a function of the characteristic parameters and the wiring lengths of the respective wiring load models. This enables the characteristic data of the wiring loads to be calculated with high accuracy.
申请公布号 CA2068043(C) 申请公布日期 1998.04.21
申请号 CA19922068043 申请日期 1992.05.05
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 KOMODA, MICHIO
分类号 G06F11/25;G06F17/50;(IPC1-7):G06F19/00 主分类号 G06F11/25
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