发明名称 |
Frequency-voltage conversion circuit, delay amount judgement circuit, system having frequency-voltage conversion circuit, method of adjusting input/output characterictics of frequency-voltage conversion circuit, and apparatus for automatically adjusting input/output characteristics of |
摘要 |
A frequency-voltage conversion circuit 21 receives a clock CLK as an input and provides a voltage IVdd in accordance with the frequency of the clock as an output. The input and output characteristic of the frequency-voltage conversion circuit 21 is adjusted to substantially match a given input and output characteristic. <IMAGE> |
申请公布号 |
AU4320197(A) |
申请公布日期 |
1998.04.17 |
申请号 |
AU19970043201 |
申请日期 |
1997.09.24 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
AKIRA YAMAMOTO;SHIRO SAKIYAMA;HIROYUKI NAKAHIRA;MASARU FUKUDA;AKIRA MATSUZAWA;SHIRO DOSHO;SHINICHI YAMAMOTO |
分类号 |
G06F1/04;G01R23/06;G06F1/32 |
主分类号 |
G06F1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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