发明名称 DEFLECTION CORRECTED WAVEFORM GENERATION CIRCUIT
摘要 PURPOSE:To obtain deflection corrected waveform different in its upper and lower parts through small-scale circuit configuration. CONSTITUTION:The output of a ROM 3 is supplied to a multiplier 7 and a register 8 through a bus line 6, and the output of a RAM 4 is supplied to the multiplier 7, and the outputs of these multiplier 7 and register 8 are selected by a selector 9, and are supplied to an adder 10. Further, the output of this adder 10 is supplied to accumulators 11, 12, and the output of the accumulator 12 is supplied to the adder 10, and simultaneously, the output of the accumulator 11 is supplied to the RAM 4, the multiplier 7 and the register 8 through the bus line 6. Further, the operation of these ROM 3, RAM 4, multiplier 7, register 8, selector 9, adder 10 and accumulators 11,12 is controlled by a signal from an instruction ROM 2, and simultaneously, the address area of the RAM 4 is switched by a count value X, and a coefficient to be used in arithmetic operation is changed.
申请公布号 JPH04326864(A) 申请公布日期 1992.11.16
申请号 JP19910097740 申请日期 1991.04.26
申请人 SONY CORP 发明人 MIYAZAKI SHINICHIRO;MURAYAMA YUTAKA
分类号 G09G1/04;G09G1/00;H04N3/23;H04N3/233 主分类号 G09G1/04
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