发明名称 Voltage regulator circuit
摘要 The circuit includes a voltage divider connected between two input terminals (E1, E2) and a smoothing capacitor (C11) connected between two output terminals (A3, A4). One of the input terminals (E2) is directly connected to one of the output terminals (A4). A switchable current source is connected between the first input terminal (E1) and the first output terminal (A3). The voltage divider includes a capacitive branch (R11, C10). A differential amplifier (OP) is provided, having a first input (+) connected to the output voltage of the voltage divider, a second input (-) connected to a reference voltage, and an output connected to the first output terminal of the circuit.
申请公布号 DE19640305(A1) 申请公布日期 1998.04.16
申请号 DE19961040305 申请日期 1996.09.30
申请人 SIEMENS AG, 80333 MUENCHEN, DE 发明人 BICHLER, HELMUT, 82166 GRAEFELFING, DE;ZIERHUT, HERMANN, 81739 MUENCHEN, DE
分类号 G05F1/46;H02M3/156;(IPC1-7):H02M7/217;G05F3/20 主分类号 G05F1/46
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