摘要 |
A digital signal processing unit (100) with an array of digital signal processors (DSP) (108, 110, 112) is provided with a recirculation path (130, 132, 134, 136, 138) for data sequences which cannot be fully processed by a single pass through the array. An input programmable gate array (PGA) (104) controls distribution of data sequences to individual DSPs (108, 110, 112) for processing and an output PGA (120) controls their recollection. The recirculation path is provided by a recirculation register (130) which is write enabled by the output PGA (120) and read enabled by the input PGA (104).
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申请人 |
ASCOM TIMEPLEX TRADING AG;BRIEL, HENRY, C., III;PUTNINS, ZIGMUNDS, A.;LUDDY, MICHAEL, J. |
发明人 |
BRIEL, HENRY, C., III;PUTNINS, ZIGMUNDS, A.;LUDDY, MICHAEL, J. |