摘要 |
A clock-synchronized fault-tolerant computer system comprising a plurality of processors, a plurality of main memory devices, a plurality of I/O devices, buses connecting them, a separation/coupling unit for separating/coupling at least one processor, at least one main memory device and at least one I/O device as one computer system, an instruction unit for giving a separation/coupling instruction to the separation/coupling unit, and a status memory for storing at least two states, that is, the same operation and an independent operation. At least one processor, at least one memory device and at least one I/O device are combined to form one independent computer system, in which a software replacement is executed. This computer system is then operated in synchronism with other computer systems, thus permitting software to be replaced without stopping the system.
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申请人 |
HITACHI, LTD.;MATSUDA, KOJI;MIYAZAKI, YOSHIHIRO;TAKAYA, SOICHI |
发明人 |
MATSUDA, KOJI;MIYAZAKI, YOSHIHIRO;TAKAYA, SOICHI |