| 摘要 |
A passive network, such as a CC-Array in the form of a chip, wherein inner conductors for a number of capacitors are brought out as connections (1-4) on a longitudinal side surface (L1) of wafer (10). Mass electrodes (0) common to the number of capacitors are, on the other hand, brought out on both front side surfaces (S1, S2) of the wafer (10).
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| 申请人 |
SIEMENS MATSUSHITA COMPONENTS GMBH & CO. KG, 81541 MUENCHEN, DE |
发明人 |
KAINZ, GERALD, DR., GRAZ, AT;AICHHOLZER, KLAUS DIETER, DR., DEUTSCHLANDSBERG, AT |
