发明名称 Clock generator circuit for microcomputers
摘要 The clock signal generator section has a piezo-electric oscillator arrangement as a signal source, and produces an output having a square wave shape with a 1:1 mark to space ratio. The generator has an oscillator 51 coupled to a detector module 52 that determines the stabilisation of the oscillation. The detector connects with an output buffer 53 and a clock buffer 54. The detector module determines when the oscillation is stable, and from this point the output clock signal is generated.
申请公布号 DE19742642(A1) 申请公布日期 1998.04.16
申请号 DE19971042642 申请日期 1997.09.26
申请人 NEC CORPORATION, TOKIO/TOKYO, JP 发明人 SUZUKI, HIDEYUKI, YAMAGATA, JP
分类号 G06F1/04;H03B5/32;H03B5/36;H03K3/02;H03K3/354;H03L3/00;(IPC1-7):H03L3/00;H03B5/06 主分类号 G06F1/04
代理机构 代理人
主权项
地址