| 摘要 |
PURPOSE:To prevent a short circuit between a gate electrode and a bit line by a method wherein a bit-line contact hole is formed in a self-aligned manner with reference to an upper-part capacitor electrode formed so as to cover the gate electrode. CONSTITUTION:A first interlayer insulating film 6 is formed so as to cover gate electrodes 41, 42; a lower-part capacitor electrode 7 composed of a polycrystalline silicon film is formed on a drain region 51. A second interlayer insulating film 12 is formed on an upper-part capacitor electrode 10 so as to expose the upper-part capacitor electrode 10; the upper-part capacitor electrode 10 is oxidized; a third insulating film 13 is formed up to a part indicated by a dotted line in the figure. In addition, a bit-line contact hole 11 is formed on a drain or source region 52 in a self-aligned manner with reference to the upper-part capacitor electrode 10; a bit line 14 is formed. Thereby, even when a high integration is executed; it is possible to prevent a short circuit between the bit line 14 and the gate electrodes 41, 42. |
