发明名称 Controlling video down-conversion
摘要 Video down-conversion apparatus in which an input, higher definition video signal is converted to an output, lower definition video signal having a smaller number of active lines and/or a smaller number of active pixels per line than the input video signal, comprises: an interpolator for receiving pixels of the input video signal at an input pixel rate and interpolating output data values at the input pixel rate, the output data values comprising active output pixel values interspersed with dummy pixel values; control logic for generating an active enable signal associated with the output data values generated by the interpolator, the active enable signal having a first state when an active output pixel value is generated and a second state when a dummy pixel value is generated; a signal processing device connected to receive the output data values generated by the interpolator, the signal processing device comprising an input latch operable to latch an output data value from the interpolator only when the active enable signal is in the first state; and a buffer memory for buffering data output by the signal processing device, for output at a pixel rate associated with the output, lower definition video signal. <IMAGE>
申请公布号 EP0773683(A3) 申请公布日期 1998.04.15
申请号 EP19960306352 申请日期 1996.09.02
申请人 SONY UNITED KINGDOM LIMITED 发明人 KEATING, STEPHEN MARK;CAMPBELL, ANDREW
分类号 H04N5/202;H04N5/208;H04N5/46;H04N7/01;H04N9/64 主分类号 H04N5/202
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