发明名称 Data retention circuit and semiconductor memory device using the same
摘要 A semiconductor memory device includes a memory unit having a plurality of memory cells, Each memory cell includes a flip-flop circuit having driver transistors, as a data retention circuit. The device further includes a threshold voltage control unit for controlling respective threshold voltages of the driver transistors. When the device is in its accessed state, the threshold voltage control unit controls at least each threshold voltage of driver transistors constituting a selected memory cell to be a first threshold voltage. When the device is in its stand-by state, the threshold voltage control unit controls threshold voltages of all of respective driver transistors constituting each memory cell to be a second threshold voltage different from the first threshold voltage. By the constitution, it is possible to realize a stable data retention operation under the condition of a lower power supply voltage, and to reduce a dissipated power in a stand-by state.
申请公布号 US5740102(A) 申请公布日期 1998.04.14
申请号 US19960754124 申请日期 1996.11.22
申请人 FUJITSU LIMITED 发明人 KAWASHIMA, SHOICHIRO
分类号 G11C11/413;G11C5/14;G11C11/401;G11C11/407;G11C11/408;G11C11/412;H01L21/8244;H01L27/11;(IPC1-7):G11C11/00 主分类号 G11C11/413
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