ANALOG AND DIGITAL HYBRID SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To reduce the influence of noise of the operation on an analog circuit even in high-speed operation by generating a reference clock for the digital circuit, and advancing the phase of the digital circuit clock and generating a clock for the analog circuit. SOLUTION: A clock generating circuit 91 generates the reference clockϕD for the digital circuit 92 from an external reference clockϕR which is supplied from outside and a phase advancing circuit 94 generates the reference clockϕA for the analog circuit 93 which is advanced in phase ahead the clockϕD byΔt. The clockϕD is supplied to the digital circuit 92 and the clockϕA is supplied to the analog circuit 93. In response to this analog clockϕA, a switch in the analog circuit 93 is turned ON and OFF, but the analog circuit 93 does not receive noise due to the operation of the digital circuit 92. The digital circuit 92 has a CPU and circuits for other specific purposes.