| 摘要 |
PROBLEM TO BE SOLVED: To automatically generate a diagnostic logic circuit in consideration of delay. SOLUTION: A delay computer 110 calculates the delay on the basis of a timing information file 101 and a logic circuit file 102 and stores it in a table 120. Before diagnostic logic generation, a point extractor 112 extracts input and output points having no delay violation and stores them in a table 121. A diagnostic logic generator 113 automatically generates diagnostic logic by referring to the table 121 and stores a logic circuit having the diagnostic logic incorporated in a file 103. The delay computer 110 reads in the file 103, recalculates the delay of the logic circuit having the diagnostic logic incorporated, and a decider 111 decides delay violation. |
