发明名称 Error checking and correcting for burst DRAM devices
摘要 A method is described of detecting and correcting errors in a computer having a memory subsystem including a burst DRAM device. The method includes the steps of beginning a write operation of N data bits to the burst DRAM device, generating M check bits from the N data bits, writing the N data bits and the M check bits to the burst DRAM device, reading the N data bits and M check bits from the burst DRAM device, generating X syndrome bits from the N data bits and the M check bits, and using the X syndrome bits to detect and correct any single bit error within the N data bits and the M check bits and to detect any double bit error within the N data bits and the M check bits. A computer system is also described having a central processing unit and a memory subsystem. The memory subsystem includes a burst DRAM device, a memory controller arranged to control the burst DRAM device in response to instructions received from the central processing unit, data format conversion circuitry arranged to convert between a data format readable by the burst DRAM device and a data format readable by the memory controller, and ECC circuitry arranged to encode a data word with an error correction code in response to a write instruction and to decode the data word and conduct error correcting and detecting in response to a read instruction.
申请公布号 US5740188(A) 申请公布日期 1998.04.14
申请号 US19960654853 申请日期 1996.05.29
申请人 COMPAQ COMPUTER CORPORATION 发明人 OLARIG, SOMPONG P.
分类号 G06F11/10;(IPC1-7):G06F11/10 主分类号 G06F11/10
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