High-speed voltage controlled oscillator having a level shifter for providing rail-to-rail output

摘要

A voltage controlled oscillator circuit with a high power supply rejection ratio incorporates a clamping transistor with respect to each output terminal which limits the signal swing of the output terminal. The limited voltage swing allows relatively large movements in the power supply and ground voltages without causing significant changes in the frequency of the output signals. Such an oscillator circuit may be incorporated into an integrated circuit characterized by noisy power supply and ground conductors. Additionally, multiple delayed versions of the output frequency may be created using a level shifter circuit and a buffer circuit. The oscillator circuit is relatively quick to react to changes in the controlling voltage, adjusting the oscillation frequency in a relatively short time interval.