发明名称 Highly compact memory device with nonvolatile vertical transistor memory cell
摘要 A highly compact nonvolatile solid state memory core is provided that stores and reproduces both digital and analog signals for multimedia applications. The memory core includes vertical electrically erasable and programmable read only memories (EEPROM) cells having, for example, a stacked gate or a split channel configuration. An array of EEPROM cells on the same chip is prewritten and is used as a reference for digital-analog conversions and for memory cell programming. An intelligent write method allows each memory cell to either store an analog signal or multiple digital signals. Based on the previously stored signal, the intelligent write method determines whether to charge or to discharge the floating gate associated with the selected memory cell. Thus, full erasure is not required prior to programming each memory cell. The present invention significantly increases the density of memory cell arrays while prolonging the useful life of the array.
申请公布号 US5739567(A) 申请公布日期 1998.04.14
申请号 US19940336361 申请日期 1994.11.08
申请人 WONG, CHUN CHIU D. 发明人 WONG, CHUN CHIU D.
分类号 G11C11/56;G11C16/04;G11C27/00;H01L21/8247;H01L27/115;H01L29/788;(IPC1-7):H01L29/06;H01L29/68 主分类号 G11C11/56
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