| 摘要 |
A sub-ranging analog to digital converter utilizes open loop differential gain amplifiers and analog switches to implement a pipeline. Each stage of the converter contains two fine range transfer amplifiers, sampling switches and hold capacitors, a low resolution sub-range analog to digital converter and a resistive ladder. The sampling switches behave as a digital to analog converter. Each stage then converts the held analog value to a digital code, which is used to operate the transfer switches to select the proper sub-range result for the next stage. The transfer switches are analog switches that perform the function of both the sampling and the sub-range transfer. The interstage amplifiers are simple open loop differential amplifiers with a rather imprecise absolute gain. Because the reference and the signal are both amplified by this imprecise gain, both the reference and the signal are amplified by the same amount. A preprocessing circuit transforms a single ended input to the analog to digital converter into four separate signals which, taken together, represent the input and reference information. Since the fine range transfer amplifiers are differential amplifiers they reject the common mode that might occur from stage to stage. However the fine range transfer amplifiers restore the signal to approximately the same common mode level at the input to each stage. Embodiments producing single or multiple output bits per stage with synchronous stages using either sub-range signal sample and hold amplifiers or dual purpose subrange transfer and sampling switches are disclosed.
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