| 摘要 |
<p>PROBLEM TO BE SOLVED: To obtain a method and circuit for controlling a test by which both a redundant memory cell and a normal memory cell can be tested in one test mode. SOLUTION: At the time of conducting tests on memory cells, an excessive amount of address signals is inputted in addition to ordinary address signals and an address decoder for a normal cell and another address decoder for a redundant cell are selectively operated in accordance with the excessive amount of address signals, and then, each address signal is transited. A test control circuit is provided with redundant test signal generating means 500 and 550 which cause redundant fuse boxes 520 and 560 to output enable signals in accordance with an address signal A13 impressed upon an address pad 281 provided for other address signals than the above-mentioned address signals and a disable signal generating means Which disables address decoders 270 and 330 for a normal cell in accordance with the output signals of the means 500 and 550.</p> |
