发明名称 VIRTUAL ADDRESSING FOR SUBSYSTEM DMA
摘要 <p>A process and implementing computer system in which a graphics subsystem includes cache registers for storing groups of consecutive addresses for each of a plurality of host memory apertures. The host system memory page table is copied to a separate section of memory. Consecutive virtual addresses are loaded in consecutive virtual memory segment cache registers in the graphics subsystem and subsequent graphics unit address requests are compared to the groups stored in the local graphics cache registers. When a match occurs, the requested address information is provided locally without incurring host memory access and readout transaction time. When no match occurs, another group of consecutive addresses is copied to the graphics cache registers and the process is repeated.</p>
申请公布号 WO1998014877(A1) 申请公布日期 1998.04.09
申请号 US1997016986 申请日期 1997.09.22
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址